SIEMENS SIMATIC S7-300 Compact CPUs CPU 312C

CPU 312C Overview

  • The compact CPU with integral digital inputs/outputs
  • For small applications with increased processing performance requirements
  • With technological functions

SIMATIC Micro Memory Card required for operation of CPU.

CPU 312C Application

The CPU 312C is the compact CPU for small-scale applications with demanding requirements regarding processing speed. Integrated digital inputs/outputs support direct interfacing with the process.

Other possible uses result from the integrated technological functions:

  • Counting
  • Frequency measurement
  • Period measurement
  • Pulse-width modulation

CPU 312C Ordering data

Product No. / Product Description Listprice / Your price
6ES7312-5BF04-0AB0
SIMATIC S7-300, CPU 312C Compact CPU with MPI, 10 DI/6 DQ, 2 high-speed counters (10 kHz) Integr. power supply 24 V DC, work memory 64 KB, Front connector (1x 40-pole) and Micro Memory Card required

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CPU 312C Design

The CPU 312C is equipped with the following:

  • Microprocessor;
    the processor achieves a processing time of 100 ns per binary instruction.
  • Extensive memory;
    64 KB high-speed work memory (equals approx. 21 K instructions) for program components relevant to execution offers sufficient space for user programs;
    SIMATIC Micro Memory Cards (max. 8 MB) as load memory for the program also allow the project to be stored in the CPU (complete with symbols and comments).
  • Flexible expansion capability
    max. 8 modules, (1-tier installation)
  • MPI multi-point interface
    The integrated MPI interface can establish as many as 6 connections simultaneously to S7-300/400 or to programming device, PC, OP. Among these connections, one is always reserved for programming devices and another for OPs. The MPI makes it possible to set up a simple network with a maximum of 16 CPUs via “global data communication”.
  • Integrated inputs/outputs
    10 digital inputs (all for alarm processing) and 6 digital outputs are available to connect the process signals to the CPU 312C.

CPU 312C Function

  • Password protection;
    a password concept protects the user program from unauthorized access.
  • Block encryption;
    the functions (FCs) and function blocks (FBs) can be stored in the CPU in encrypted form by means of S7-Block Privacy to protect the know-how of the application.
  • Diagnostics buffer;
    the last 500 error and interrupt events are stored in a buffer for diagnostic purposes, of which 100 are stored retentively.
  • Maintenance-free data backup;
    retentive data is automatically backed up by the CPU if the voltage is interrupted and is available unchanged after the voltage has been reconnected.

Parameterizable properties

The S7 configuration as well as the properties and response of the CPUs can be parameterized using STEP 7:

  • General;
    definition of the name, system ID and location ID
  • Startup;
    definition of the startup characteristics of the CPU and the monitoring time
  • Cycle/clock memory;
    specifying the maximum cycle time and loading, setting the clock memory address.
  • Retentivity;
    setting retentive areas
  • Time-of-day interrupts;
    setting of start date, start time and periodicity
  • Cyclic interrupts;
    setting of periodicity
  • System diagnostics;
    determining handling and scope of the diagnostic messages
  • Clock;
    setting the type of synchronization in the AS or on the MPI
  • Protection level;
    specifying the access rights to program and data
  • Communication;
    reservation of connection resources
  • MPI multi-point interface;
    determining station addresses
  • Digital inputs/outputs;
    setting of addresses, input delay and process interrupt
  • Integrated function “counting”;
    setting the addresses, parameter assignment of the modes “continuous counting”, “single counting”, “periodic counting”, “frequency measurement” and “pulse width modulation”

CPU 312C Technical specifications

Article number

6ES7312-5BF04-0AB0

CPU312C, 10DI/6DO, 64 KB

General information

HW functional status

01

Firmware version

V3.3

Engineering with

  • ● Programming package

STEP 7 V5.5 + SP1 or higher or STEP 7 V5.3 + SP2 or higher with HSP 203

Supply voltage

Rated value (DC)

  • ● 24 V DC

Yes

permissible range, lower limit (DC)

19.2 V

permissible range, upper limit (DC)

28.8 V

external protection for power supply lines (recommendation)

Miniature circuit breaker, type C; min. 2 A; miniature circuit breaker type B, min. 4 A

Mains buffering

  • ● Mains/voltage failure stored energy time

5 ms

  • ● Repeat rate, min.

1 s

Digital outputs

  • — Rated value (DC)

24 V

  • — Reverse polarity protection

No

Input current

Current consumption (rated value)

570 mA

Current consumption (in no-load operation), typ.

90 mA

Inrush current, typ.

5 A

I²t

0.7 A²·s

Digital outputs

  • ● from load voltage L+, max.

25 mA

Power loss

Power loss, typ.

8 W

Memory

Work memory

  • ● integrated

64 kbyte

  • ● expandable

No

  • ● Size of retentive memory for retentive data blocks

64 kbyte

Load memory

  • ● Plug-in (MMC)

Yes

  • ● Plug-in (MMC), max.

8 Mbyte

  • ● Data management on MMC (after last programming), min.

10 y

Backup

  • ● present

Yes; Guaranteed by MMC (maintenance-free)

  • ● without battery

Yes; Program and data

CPU processing times

for bit operations, typ.

0.1 µs

for word operations, typ.

0.24 µs

for fixed point arithmetic, typ.

0.32 µs

for floating point arithmetic, typ.

1.1 µs

CPU-blocks

Number of blocks (total)

1 024; (DBs, FCs, FBs); the maximum number of loadable blocks can be reduced by the MMC used.

DB

  • ● Number, max.

1 024; Number range: 1 to 16000

  • ● Size, max.

64 kbyte

FB

  • ● Number, max.

1 024; Number range: 0 to 7999

  • ● Size, max.

64 kbyte

FC

  • ● Number, max.

1 024; Number range: 0 to 7999

  • ● Size, max.

64 kbyte

OB

  • ● Description

see instruction list

  • ● Size, max.

64 kbyte

  • ● Number of free cycle OBs

1; OB 1

  • ● Number of time alarm OBs

1; OB 10

  • ● Number of delay alarm OBs

2; OB 20, 21

  • ● Number of cyclic interrupt OBs

4; OB 32, 33, 34, 35

  • ● Number of process alarm OBs

1; OB 40

  • ● Number of startup OBs

1; OB 100

  • ● Number of asynchronous error OBs

4; OB 80, 82, 85, 87

  • ● Number of synchronous error OBs

2; OB 121, 122

Nesting depth

  • ● per priority class

16

  • ● additional within an error OB

4

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