SIEMENS SIPLUS S7-300 CPU 312C
SIPLUS S7-300 CPU 312C Overview
- The compact CPU with integral digital inputs/outputs
- For small applications with increased processing performance requirements
- With technological functions
Micro Memory Card required for operation of CPU.
SIEMENS SIPLUS S7-300 CPU 312C
SIPLUS S7-300 CPU 312C Application
The CPU 312C is the compact CPU for small-scale applications with demanding requirements regarding processing speed. Integrated digital inputs/outputs support direct interfacing with the process.
Other possible uses result from the integrated technological functions:
- Counting
- Frequency measurement
- Period measurement
- Pulse-width modulation
SIPLUS S7-300 CPU 312C Design
The CPU 312C is equipped with the following:
- Microprocessor;
the processor achieves a processing time of 100 ns per binary instruction. - Extensive memory;
64 KB high-speed work memory (equals approx. 21 K instructions) for program components relevant to execution offers sufficient space for user programs;
SIMATIC Micro Memory Cards (max. 8 MB) as load memory for the program also allow the project to be stored in the CPU (complete with symbols and comments). - Flexible expansion capability
max. 8 modules, (1-tier installation) - MPI multi-point interface
The integrated MPI interface can establish as many as 6 connections simultaneously to S7-300/400 or to programming device, PC, OP. Among these connections, one is always reserved for programming devices and another for OPs. The MPI makes it possible to set up a simple network with a maximum of 16 CPUs via “global data communication”. - Integrated inputs/outputs
10 digital inputs (all for alarm processing) and 6 digital outputs are available to connect the process signals to the CPU 312C.
SIPLUS S7-300 CPU 312C Function
- Password protection;
a password concept protects the user program from unauthorized access. - Block encryption;
the functions (FCs) and function blocks (FBs) can be stored in the CPU in encrypted form by means of S7-Block Privacy to protect the know-how of the application. - Diagnostics buffer;
the last 500 error and interrupt events are stored in a buffer for diagnostic purposes, of which 100 are stored retentively. - Maintenance-free data backup;
retentive data is automatically backed up by the CPU if the voltage is interrupted and is available unchanged after the voltage has been reconnected.
Technical specifications
Article number |
6AG1312-5BF04-2AY0 |
6AG1312-5BF04-7AB0 |
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SIPLUS S7-300 CPU312C EN50155 |
SIPLUS S7-300 CPU312C |
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General information |
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HW functional status |
01 |
01 |
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Firmware version |
V3.3 |
V3.3 |
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Engineering with |
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STEP 7 V5.5 + SP1 or higher or STEP 7 V5.3 + SP2 or higher with HSP 203 |
STEP 7 V5.5 + SP1 or higher or STEP 7 V5.3 + SP2 or higher with HSP 203 |
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Supply voltage |
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Rated value (DC) |
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Yes; A power supply according to EN 50155 shall be used |
Yes |
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permissible range, lower limit (DC) |
19.2 V |
19.2 V |
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permissible range, upper limit (DC) |
28.8 V |
28.8 V |
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external protection for power supply lines (recommendation) |
Miniature circuit breaker, type C; min. 2 A; miniature circuit breaker type B, min. 4 A |
Miniature circuit breaker, type C; min. 2 A; miniature circuit breaker type B, min. 4 A |
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Mains buffering |
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5 ms |
5 ms |
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1 s |
1 s |
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Digital outputs |
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24 V |
24 V |
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No |
No |
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Input current |
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Current consumption (rated value) |
570 mA |
570 mA |
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Current consumption (in no-load operation), typ. |
90 mA |
90 mA |
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Inrush current, typ. |
5 A |
5 A |
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I²t |
0.7 A²·s |
0.7 A²·s |
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Digital outputs |
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25 mA |
25 mA |
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Power loss |
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Power loss, typ. |
8 W |
8 W |
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Memory |
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Work memory |
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64 kbyte |
64 kbyte |
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No |
No |
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64 kbyte |
64 kbyte |
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Load memory |
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Yes |
Yes |
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8 Mbyte |
8 Mbyte |
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10 y |
10 y |
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Backup |
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Yes; Guaranteed by MMC (maintenance-free) |
Yes; Guaranteed by MMC (maintenance-free) |
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Yes; Program and data |
Yes; Program and data |
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CPU processing times |
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for bit operations, typ. |
0.1 µs |
0.1 µs |
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for word operations, typ. |
0.24 µs |
0.24 µs |
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for fixed point arithmetic, typ. |
0.32 µs |
0.32 µs |
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for floating point arithmetic, typ. |
1.1 µs |
1.1 µs |
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CPU-blocks |
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Number of blocks (total) |
1 024; (DBs, FCs, FBs); the maximum number of loadable blocks can be reduced by the MMC used. |
1 024; (DBs, FCs, FBs); the maximum number of loadable blocks can be reduced by the MMC used. |
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DB |
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1 024; Number range: 1 to 16000 |
1 024; Number range: 1 to 16000 |
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64 kbyte |
64 kbyte |
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FB |
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1 024; Number range: 0 to 7999 |
1 024; Number range: 0 to 7999 |
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64 kbyte |
64 kbyte |
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FC |
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1 024; Number range: 0 to 7999 |
1 024; Number range: 0 to 7999 |
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64 kbyte |
64 kbyte |
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OB |
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see instruction list |
see instruction list |
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64 kbyte |
64 kbyte |
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1; OB 1 |
1; OB 1 |
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1; OB 10 |
1; OB 10 |
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2; OB 20, 21 |
2; OB 20, 21 |
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4; OB 32, 33, 34, 35 |
4; OB 32, 33, 34, 35 |
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1; OB 40 |
1; OB 40 |
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1; OB 100 |
1; OB 100 |
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4; OB 80, 82, 85, 87 |
4; OB 80, 82, 85, 87 |
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2; OB 121, 122 |
2; OB 121, 122 |
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Nesting depth |
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16 |
16 |
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4 |
4 |
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Counters, timers and their retentivity |
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S7 counter |
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256 |
256 |
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Retentivity |
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Yes |
Yes |
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0 |
0 |
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255 |
255 |
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Z 0 to Z 7 |
Z 0 to Z 7 |
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Counting range |
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0 |
0 |
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999 |
999 |
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